(1) Field of the Invention
This invention relates to forming conducting plugs to form self aligned contacts and more particularly to forming polysilicon plugs to fill contact holes in low resistance self aligned contacts.
(2) Description of the Related Art
Self aligned contacts in silicon integrated circuit wafers are frequently formed using a metal silicide process such as TiSix. Contacts are also formed using a single polysilicon process to form a polysilicon plug followed by etchback or chemical mechanical polishing to remove the polysilicon not filling the contact hole.
U.S. Pat. No. 5,723,374 to Huang et al. describes the use of polysilicon to form a contact hole plug in forming a self aligned contact.
U.S. Pat. No. 5,795,827 to Liaw et al. describes the formation of a polycide contact structure using a high temperature, rapid thermal anneal to form a self aligned contact.
U.S. Pat. No. 5,763,303 to Liaw et al. describes the use of a rapid thermal chemical vapor deposition procedure, RTCVD, in the formation of self aligned contacts.
U.S. Pat. No. 5,766,992 to Chou et al. describes the formation of self aligned contacts in MOSFET devices using silicon nitride spacers to protect the polysilicon gate electrode during the opening of the self aligned contact hole.
The circuits in integrated circuit wafers require the use of electrical contacts to make electrical connection between the patterned conductors on the wafers and the various devices in the wafer. The contact resistance of these electrical contacts is key to their usefulness and must be kept as low as possible. Self aligned contacts are often used for these electrical contacts and are formed through a contact hole formed in a layer of dielectric. Good step coverage in filling the contact hole is very important in achieving a low contact resistance. Silicide contacts, such as TiSix, are often used for such contacts. There is an increasing need for electrical contacts having improved step coverage over the edges of the contact hole and lower contact resistance.
It is a principle objective of this invention to provide a method of forming an electrical contact which provides good step coverage in filling the contact hole and reduced contact resistance.
This objective is achieved using a two step polysilicon process to fill the contact holes. A contact hole is opened in a layer of dielectric exposing the region of the wafer where the contact will be formed. A layer of first polysilicon, preferably a high temperature film, HTF, deposition doped polysilicon, is deposited to cover the sidewalls and bottom of the contact holes. Ion implantation is then used to deposit impurities through the layer of first polysilicon into the region of the wafer where the contact will be formed. The first polysilicon deposited on the sidewalls and bottom of the contact holes is then treated with C2F6/O2. A layer of second polysilicon, preferably furnace doped polysilicon, is then deposited over the first polysilicon to complete the filling of the contact hole. The wafer is then planarized using chemical mechanical polishing or etchback.